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Computer Architecture

Every abstraction eventually runs on real silicon. Architecture is where code meets voltages, gates, and clock ticks.

FIG_002
ABANDORXOR
AND, OR, XOR — the same two inputs, three answers.

It begins with a switch. A transistor that is either on or off gives you a bit, and a handful of transistors wired together give you a gate that computes AND, OR, or NOT.

Start from that switch and build up: gates become adders, adders become a datapath, and a datapath plus control becomes a processor that actually executes instructions.

FIG_003
I1I2I3I4FDEWFDEWFDEWFDEWt0t1t2t3t4t5t6
Overlap work to go faster.

The instruction set is the seam between hardware and software — a small, fixed vocabulary the hardware implements and every compiler and program above it is written against.

Performance is decided here. Pipelining, caches, and the memory hierarchy explain why one loop runs ten times faster than another that looks identical — and how to write code that uses the hardware well.

FIG_004
REGCACHERAMDISK
The memory hierarchy: fast & small to slow & vast.
FIG_001
▸ binary addition — 109 + 47carryABsum100111001101001111111111010110+= 109= 47= 156[ BINARY ADDITION ]
A ripple-carry adder: each column adds two bits and a carry, and the carry ripples left to give the sum.

Modern processors preserve a simple sequential model while executing very differently underneath: pipelining, out-of-order execution, branch prediction, and caches all hide latency behind that model.

FIG_005
addrA4CACHEstatus·
A cache: a hit is instant, a miss is a trip to memory.

Understand the machine and you stop being surprised by it. You’ll know why things are slow, where the limits are, and how to work with the hardware instead of against it.

Everything above depends on this layer. Every language, framework, and abstraction eventually compiles down to instructions this machine runs, one clock tick at a time.

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